1 thought on “Motherboard diagnostic card display RR”
Leslie
Motherboard diagnostic card code Daquan PCI/ISA dual -purpose DEBUG card failure code bright table (only suitable for PCI/ISA dual -use type and PCI single -purpose type)
00 (see special code meaning) The display system has been displayed. Configuration; Infigurement of INT19 guidance loading. (See the meaning of special code) (see the meaning of special code)
01 processor test 1 to process state verification. If the test fails, the cycle is infinite. The test of the processor register is about to begin, and the interruption cannot be stopped. The CPU register test is in progress or failure.
02 determines the type of diagnosis (normal or manufacturing). If the keyboard buffer contains data, it will fail. Discontinue non -blocking interruption; starting by delay. CMOS is writing/read is in progress or fault.
03 Clear the 8042 keyboard controller and emit Test-KBRD command (AAH). Power -powered delay has been completed. The ROM B10S checking parts are in progress or failure.
04 to reset the 8042 keyboard controller and verify Testkbrd. The keyboard controller is more reset/power -on test. The test of the programm can be performed or failed.
05 If repeatedly repeatedly manufactured 1 to 5, you can get 8042 control status. The soft reset/power is determined; the ROM is about to start. DMA was initially prepared or failed.
06 to make the circuit film initial preparation. Disable videos, spectacles, DMA circuit films, and clear DMA circuit films, all page registers and CMOS stop bytes. Make the circuit films initial preparation, stop video, singularity, DMA circuit film, and remove DMA circuit films, all page registers and CMOS shutdown bytes. ROM BIOS has been started, and the sum of the ROM BIOS inspection, and check whether the keyboard buffer is cleared. DMA initial page register read/write test is in progress or failure.
07 processor test 2 to verify the work of the CPU register. The ROM BIOS test is normal, the keyboard buffer has been cleared, and the BAT (basic guarantee test) command is issued to the keyboard. It is meaningless
08 to make the CMOS timer as initial preparation, and the loop of the timer is updated normally. The BAT command has been issued to the keyboard, and the BAT command is about to be written. The RAM update test is in progress or failure.
09 EPROM Check Term and must be approved by zero. Credit the basic guarantee test of the keyboard, and then verify the keyboard command byte. The first 64K RAM test is ongoing.
0a to make the video interface initial preparation. Send the keyboard command byte code, and the command byte data is about to be written. The first 64K RAM chip or data cable fails and displays.
0b test 8254 channel 0. Write the keyboard controller command by byte, and the blocking/unlock commands of the pin 23 and 24 of pins will be issued. The first 64K RAM Qi/Puppet logic fails.
0c test 8054 channel 1. Keyboard controller pins 23, 24 have been blocked/unlock; NOP command has been issued. The first 64K RAM address line faults.
[MEM] 0D 1. Check whether the CPU speed matches the system clock. 2. Check whether the programming value of the control chip is in line with the initial settings. 3. Video channel test, if it fails, the horn. The NOP command has been processed; then test the CMOS to stop the register. The first 64K RAM's amazing failure.
0E test CMOS shutdown byte. CMOS stops the register read/write test; the sum of CMOS inspection will be calculated. Input/output port address.
0F test expanded CMOS. CMOS tests have been calculated to write the diagnostic bytes; CMOS starts to prepare. It is meaningless.
10 test DMA channel 0. CMOS has made initial preparation, and the CMOS state register is about to make initial preparation for the date and time. The first 64K RAM failure.
11 test DMA channel 1. The COMS state register is initially prepared, and DMA and interrupt controllers are about to be discontinued. The first 64K RAM is the first.
12 test DMA page register. Discontinue DMA controller 1 and interrupt controller 1 and 2; the video display is about to make the port B as the initial preparation. The first 64K RAM is the second.
13 Test 8471 keyboard controller interface. The video monitor has been discontinued, Port B has been initially prepared; The first 64K RAM is the third place.
14 Test the memory update trigger circuit. The automatic detection of the circuit film initialization/memory is over; the 8254 timer test is about to start. The first 64K RAM is the fourth failure.
15 Test 64K system memory beginning. The 2nd channel timer was tested half; 8254 passing the second channel timer is about to complete the test. The first 64K RAM is the fifth failure.
16 Create an interrupt vector table used in 8259. The 2 passage timer test is over; 8254 The 1st channel timer is about to complete the test. The first 64K RAM is the 6th.
17 adjust the video input/output work. The first passage timer test is over; The first 64K RAM is the 7th.
18 Test video memory. If you install the selected video BIOS, you can bypass it. The 0 -channel timer test is over; the memory is about to start. The first 64K RAM is 8th.
19 Test the interrupt controller of the 1st channel (8259). The memory has begun, and the memory update will be completed. The first 64K RAM is the 9th.
1A Test the interrupt controller of the 2nd channel (8259). The memory update line is being triggered, and the 15 microseconds/disconnection will be checked soon. The first 64K RAM is 10th.
1b measuring CMOS battery level. Complete the memory update time 30 microsecond test; the basic 64K memory test is about to start. The first 64K RAM fault.
1c test sum of COMS inspection. It is meaningless. The first 64K RAM failure.
1d adjustment of the configuration of COMS. It is meaningless. The first 64K RAM is the 13th failure.
1E to determine the size of the system memory, and compare objective presence with the COMS value. It is meaningless. The first 64K RAM is 14th in failure.
1F test 64K memory to up to 640K. It is meaningless. The first 64K RAM is the 15th.
20 measures the fixed 8259 interrupt position. Start the basic 64K memory test; the address line is about to test. The subordinate DMA register test is in progress or failure.
21 Maintain an irreversible interruption (NMI) bit (inspection of the puppet or input/output channel). Through the address line test; the puppet is about to trigger. The main DMA register test is in progress or failure.
22 Test the interrupt function of 8259. End triggering spectacle; you will start serial data reading/writing test. The main interrupt shielding register is in progress or fails.
23 test protection method 8086 virtual and pages of 8186. Basic 64K serial data reading/writing test is normal; any adjustment before interrupt vector initialization starts. The subordinate interrupted shielding register test is in progress or failure.
24 to determine extended memory above 1MB. Any adjustment before the vector is completed, and the initial preparation of the vector will soon begin. Set the ES section address register registry to the high -end memory.
25 Test all the memory after the first 64K. The initial preparation of the interrupt vector is completed; the input/output port of 8042 will be read for rotation arbitrarily. The interrupt vector is undergoing or failing.
26 test protection method. Read the input/output port of the read and write 8042; the rotary type is about to start making the global data initial preparation. Turn on the A20 address line; make it participate.
27 Determine the control or shielding RAM of the ultra -high -speed buffer downturn. The initial preparation of all 1 data is over; any initial preparation after interrupt vector will be performed. The keyboard controller test is in progress or failure.
28 determines the control of the ultra -high -speed buffer storage or a special 8042 keyboard controller. The initial preparation of the interrupt vector is completed; CMOS power failure/inspection and computing are in progress.
29 is meaningless. The monochrome method has been adjusted, and the color method is about to be adjusted. CMOS configuration validity checks are ongoing.
2a to make the keyboard controller as initial preparation. The color method has been adjusted, and the trigger is about to be triggered before the ROM test. Set the basic memory of 64K.
2b to make the disk drive and controller as initial preparation. Triggering the end of the strangeness; any adjustment required before the optional video ROM test. The screen memory test is in progress or failure.
2c check the serial port and make it initial preparation. Complete the processing before the video ROM control; the optional video ROM will be viewed and controlled. The screen is initially prepared or failed.
2d to check in parallel serial port and make it initial preparation. In order to complete the optional video ROM control, any other processing control will be performed after the video ROM replies. Scanning test is in progress or failure.
2 to make the disk drive and controller as initial preparation. After the video ROM control is controlled, the processing is restored; if you do not find EGA/VGA, you need to perform a display memory read and write test. Check the video ROM is ongoing.
2F to detect mathematical collaborators and make it initial preparation. No EGA/VGA was found; the memory reading/writing test will be displayed soon. It is meaningless.
30 Establish basic memory and extended memory. By displaying memory reading/writing test; scan check will be performed soon. Think that the screen can work.
31 Detection from C800: 0 to Efff: 0 to select ROM, and make it prepare for life. The display of the memory read/writing test failed, and another display memory read/writing test will be performed soon. Monochrome monitor can work.
32 The program programming of I/O chips on the motherboard COM/LTP/FDD/sound device makes it suitable for setting value. Through another display memory read/write test; another monitor scan inspection will be performed soon. Column monitors (40 columns) can work.
33 is meaningless. The video display is over; the types of the adjustment switch and the actual card inspection of the display will begin. Column monitors (80 columns) can work. 34 is meaningless. The displayed adapter has been tested; then the display is adjusted. Timely titer interrupt test is in progress or failure.
35 is meaningless. Complete the adjustment display method; the data area of BIOS ROM is about to check. The stop testing is in progress or failure.
36 is meaningless. The BIOS ROM data area has been checked; A -20 in the door circuit fails.
37 is meaningless. The cursor of the identification of the power information has been completed; the power -on information will be displayed soon. The accident interruption in the protection method.
38 is meaningless. Complete the display of the power -on information; the new cursor position is about to read. RAM testing is undergoing or address failure> FFFFH.
39 is meaningless. Read the saving cursor position, and the reference information will be displayed soon. It is meaningless.
3A meaningless. The reference information string is over; the information is about to be displayed (ESC). The reference information string is over; the information is about to be displayed. Test or failure of the time interval passage 2.
3b uses OPT circuit films (just 486) to make the auxiliary ultra -high -speed buffer storage memory as initial preparation. Displayed information: virtual method, memory test is about to begin. The calendar clock test calculated daily is in progress or failure.
3c establishment of a sign that allows entering CMOS settings. It is meaningless. The serial port test is in progress or failure.
3D first female Taiwan chemical keyboard/PS2 mouse/PNP equipment and total memory node. It is meaningless. The parallel port testing is in progress or failure.
3E try to open the L2 high -speed cache. It is meaningless. Mathematical processor testing is in progress or failure.
3F is meaningless. It is meaningless. It is meaningless.
40 is meaningless. It has begun to prepare a virtual method test; it is about to be tested from the video deposits. Adjust the CPU speed so that the outer clock is accurately matched.
41 interrupted itself and opened, and the initialization data can be initialized for 0: 0 detection memory transformation (interrupt controller or memory poor). Recovery after the video storage memory test; the descriptor table is about to prepare. The system plug -in board chooses to fail.
42 Display the window into setup. The descriptor table is ready; the virtual method is about to perform a memory test. Extend the CMOS RAM failure.
43 If you plug and play with BIOS, the serial port and initialize the mouth. Enter the virtual method; it is about to achieve interruption for the diagnostic method. It is meaningless.
44 is meaningless. Realized interruption (such as connecting the diagnostic switch; the data is about to check the data to check the memory of 0: 0. BIOS interrupt for initialization. ; The size of the memory is about to return to 0: 0 and find the scale of the system memory. It is meaningless.
46 is meaningless. Test the memory memory has been returned; the memory size is calculated, and the page will be written to test the memory. Check only the memory ROM version.
47 is meaningless. The upcoming memory test page on the extended memory; the basic 640K memory is written to the page. It is meaningless. 48 is meaningless. Write the basic memory to the page; the memory of more than 1MB will be determined soon. Video check, cmos re -configure.
49 is meaningless. Find out 1MB memory and test; it will be determined to determine more than 1MB of memory. It is meaningless meaningless .
4A is meaningless. Finding more than 1MB of memory and testing: The data area of BIOS ROM is about to check. Perform the video initialization. 4b is meaningless. After the inspection is over, it is about to check and clear up 1MB of memory for the soft residence. It is meaningless.
4c is meaningless. Clear more than 1MB of memory (soft reset) to remove more than 1MB of memory. Shielding video BIOS ROM.
4d is meaningless. Remove the memory (soft reset) of more than 1MB; the size of the storage memory. It is meaningless. Information, and wait for the customer to continue according to (F1). Start the test of the memory: (no soft reset); the test of the first 64K memory will be displayed. Show copyright information. Data, conduct DOS guidance. Starting the size of the memory, the testing memory will be updated; it will perform serial and random memory tests. It is meaningless. Stay in CMOS. Complete the memory test below 1MB; the size of the high -speed memory is to be locked and masked. Send the CPU type and speed to the screen.
51 is meaningless. Test more than 1MB of memory. Significance.
52 All ISA reads only memory ROM for initialization, and finally assigns the initialization of IRQ numbers to PCI. It has completed the memory test of more than 1MB; R n 53 If it is not plugged in BIOS, initialize the serial port, and set the clock value. Save the CPU register and memory, and it will enter the real address method. It is meaningless. 54 It is meaningless. Successfully open the real -address method; the register that is about to restore when it is ready to stop. Scan the "strike keys".
55 is meaningless. The register has been restored, and the address line of the door circuit A -20 will be discontinued. It is meaningless.
56 is meaningless. The address line of the A -20 is successfully discontinued; the BIOS ROM data area is about to check. The keyboard test is over.
57 is meaningless. Bios ROM's data area was checked half; continued. It is meaningless.
58 is meaningless. The data area of the BIOS ROM is over; the discovery information will be removed. Non -setting interrupt test.
59 is meaningless. The information has been cleared; the information has been displayed; the test of DMA and interrupt controller is about to start. It is meaningless.
5A meaningless. It is meaningless. Display pressing the "F2" key.
5b meaningless. It is meaningless. Test the basic memory address line.
5c meaningless. It is meaningless. Test 640K basic memory.
5d meaningless. It is meaningless. It is meaningless.
5E is meaningless. It is meaningless. It is meaningless.
5f meaningless. It is meaningless. It is meaningless.
60 Set the hard disk guidance sector virus protection function. Test through the DMA page register; the video memory is about to test. Test extended memory.
61 Display the system configuration table. The video storage memory test is over; the DMA#L basic register will be performed. It is meaningless.
62 starts to use interrupt 19H to guide the system. Through the test of the basic register of DMA#L; the test of the DMA#2 register is about to be performed. Test extended memory address lines.
63 is meaningless. Test through DMA#2 Basic register; the BIOS ROM data area is about to check. It is meaningless.
64 is meaningless. The BIOS ROM data area was checked half and continued. It is meaningless.
65 is meaningless. The BIOS ROM data area is over; the DMA device 1 and 2 will be programmed. It is meaningless.
66 is meaningless. DMA device 1 and 2 programming is over; it is about to use the 59 interrupt controller for initial preparation. The cache registry is optimized.
67 is meaningless. The initial preparation of 8259 is over; the keyboard test is about to start. It is meaningless.
68 is meaningless. It is meaningless. Both external cache and CPUs work.
69 is meaningless. It is meaningless. It is meaningless.
6a meaningless. It is meaningless. Test and show the external cache value.
6b meaningless. It is meaningless. It is meaningless.
6c is meaningless. It is meaningless. Show the shielded content.
6d is meaningless. It is meaningless. It is meaningless.
6E is meaningless. It is meaningless. Display the auxiliary configuration information.
6f is meaningless. It is meaningless. It is meaningless.
70 is meaningless. It is meaningless. The detected error code is sent to the screen display.
71 is meaningless. It is meaningless. It is meaningless.
72 is meaningless. It is meaningless. Is there any error in the detection configuration.
73 is meaningless. It is meaningless. It is meaningless.
74 is meaningless. It is meaningless. Test the real hours.
75 is meaningless. It is meaningless. It is meaningless.
76 is meaningless. It is meaningless. Check the keyboard error.
77 is meaningless. It is meaningless. It is meaningless.
78 is meaningless. It is meaningless. It is meaningless.
79 is meaningless. It is meaningless. It is meaningless.
7a meaningless. It is meaningless. Lock the keyboard.
7b meaningless. It is meaningless. It is meaningless.
7c is meaningless. It is meaningless. Set the hardware interrupt vector.
7d is meaningless. It is meaningless. It is meaningless.
7E is meaningless. It is meaningless. Test whether there is a mathematical processor.
7f meaningless. It is meaningless. It is meaningless.
80 is meaningless. At the beginning of the keyboard test, the keyboard is being cleared and checked, and the keyboard is about to restore the keyboard. Turn off the programmable input/output device.
81 is meaningless. Find out the hardships of the keyboard restoration; the test command of the keyboard control port is about to issue the keyboard control port. It is meaningless.
82 is meaningless. The keyboard controller interface test is over, and the command byte will soon be written and the circulatory buffer is prepared for initial preparation. Detect and install a fixed RS232 interface (serial port).
83 is meaningless. The command by bytes have been written, the initial preparation of global data has been completed; It is meaningless.
84 is meaningless. The keys that have been locked have been checked, and the memory is about to check whether the memory is lost. Detect and install a fixed parallel port.
85 is meaningless. The size of the memory has been checked; soft errors and passwords or bypass arrangements are displayed soon. It is meaningless.
86 is meaningless. Checking passwords: programming is about to be arranged. Re -open the programmable I/O device and test whether there is a conflict of fixed I/O.
87 is meaningless. The programming before the arrangement will be programmed. It is meaningless.
88 is meaningless. Reproduce the screen from the CMOS arrangement; it is about to perform later programming. Initialize the BIOS data area.
89 is meaningless. Complete the arrangement after the arrangement; the screen information is about to be displayed soon. It is meaningless.
8a meaningless. Display the first screen information. Expand the initialization of the BIOS data area.
8b meaningless. Display information: The main and video BIOS is about to block. It is meaningless.
8c is meaningless. Successfully shielded the main and video BIOS, and the programming options after CMOS will start. Perform the soft drive controller initialization.
is meaningless. I have arranged for option programming and then check the mouse and make initial preparation. It is meaningless.
8E is meaningless. Check the mouse and complete the initial preparation; it is about to reset the hard and soft disk. It is meaningless.
8f is meaningless. The soft disk has been checked, and the disk will be initially prepared, and then you want to prepare a soft disk. It is meaningless.
90 is meaningless. Soft disk configuration is over; the existence of the hard disk will be tested. The hard disk controller is initialized.
91 is meaningless. The hard disk is over; then the hard disk is configured. Local bus hard disk controller initialization.
92 is meaningless. The hard disk configuration is completed; the data area of the BIOS ROM is about to check. Jump to user path 2.
93 is meaningless. The data area of BIOS ROM has been checked in half; continuing. It is meaningless.
94 is meaningless. The data area of BIOS ROM is checked, that is, the adjustment of the memory is basically adjusted and the size of the memory. Turn off the A20 address line.
95 is meaningless. The size of the memory is adjusted according to the support of the mouse and hard disk 47; the memory is soon inspected. It is meaningless.
96 is meaningless. The test shows the recovery after the memory; the initial preparation before the C800: 0 is selected. The "ES section" registry is cleared.
97 is meaningless. C800: 0 Select any initial preparation before the ROM control, and then check and control the selection of ROM. It is meaningless.
98 is meaningless. Select the control of the ROM; the processing required after any selection ROM replies. Find ROM selection.
99 is meaningless. Any initial preparation required after the ROM test is ended; the data area or printer basic address of the timer will soon be established. It is meaningless.
9a meaningless. The return operation after adjusting the timer and printing the basic address; the basic address of the RS -232 is about to adjust. Shield the ROM selection.
9b meaningless. Return after the basic address of the RS -232; the initial preparation of the collaborative processor test is about to be performed. It is meaningless.
9c is meaningless. The initial preparation is required before the processor test; the associate processor is then made for initial preparation. Establish power saving management.
9d is meaningless. The collaborator is prepared for the initial preparation, and any initial preparation is about to be tested by the collaborator. It is meaningless.
9E is meaningless. The initial preparation after completing the collaborator will check the expansion keyboard, keyboard recognition symbols, and digital locking. Open hardware interrupt.
9f is meaningless. The extension of the keyboard has been checked, the identification logo is adjusted, and the digital lock is connected or disconnected, and the keyboard recognition command will be issued. It is meaningless.
a0 is meaningless. Endent keyboard recognition commands: The keyboard recognition logo is about to restore. Setting time and date.
a1 is meaningless. The keyboard recognition logo is restored; then tests for high -speed buffer storage storage. It is meaningless.
a2 is meaningless. High -speed buffer storage memory test is over; any soft errors will be displayed soon. Check the keyboard lock.
a3 is meaningless. The soft error display is complete; the rate of keyboard blow is about to adjust. It is meaningless.
a4 is meaningless. After adjusting the keyboard's blow rate, the waiting state of the storage memory is about to formulate. The keyboard repeats the initialization of the input rate.
a5 is meaningless. The memory waiting state is set; then the screen will be cleared. It is meaningless.
a6 is meaningless. The screen has been cleared; It is meaningless.
a7 is meaningless. It has been enabled to block the interrupt and the strangeness; it is about to control any initial preparation required by the optional ROM in E000: 0. It is meaningless.
a8 is meaningless. Control ROM's initial preparation before E000: 0, and then control any initial preparation required for E000: 0. Clear the "F2" key prompt.
a9 meaningless. Return to control E000: 0 ROM, and any initial preparation required to control E000: 0 will be controlled. It is meaningless.
aa meaningless. The initial preparation of the initial preparation after the control of the E000: 0 control is over; the configuration of the system is about to display the system. Scan the "F2" key to strike.
ab is meaningless. It is meaningless. It is meaningless.
ac meaningless. It is meaningless. Enter the settings.
ad is meaningless. It is meaningless. It is meaningless.
ae meaningless. It is meaningless. Clear the self -inspection logo.
AF meaningless. It is meaningless. It is meaningless.
B0 is meaningless. It is meaningless. Check non -critical errors.
b1 is meaningless. It is meaningless. It is meaningless.
b2 is meaningless. It is meaningless. Power -powered self -inspection is prepared to enter the operating system guidance.
b3 is meaningless. It is meaningless. It is meaningless.
b4 is meaningless. It is meaningless. The bee ring rang.
b5 is meaningless. It is meaningless. It is meaningless.
b6 is meaningless. It is meaningless. Detect password settings (optional).
b7 is meaningless. It is meaningless. It is meaningless.
b8 is meaningless. It is meaningless. Clear all description tables.
b9 is meaningless. It is meaningless. It is meaningless.
ba meaningless. It is meaningless. It is meaningless.
bb meaningless. It is meaningless. It is meaningless.
BC is meaningless. It is meaningless. Clear the verification check value.
bd meaningless. It is meaningless. It is meaningless.
Be's default value enters the control chip, which is in line with the adjustable binary default value table. It is meaningless. Clear the screen (optional).
BF test CMOS establishment value. It is meaningless. Detect the virus and prompt to do information backup.
C0 initialize a high -speed cache. It is meaningless. Trial guidance with interrupt 19.
C1 memory self -examination. It is meaningless. Find the "55" and "AA" mark in the guidance sector.
c2 is meaningless. It is meaningless. It is meaningless.
c3 The first 256k memory test. It is meaningless. It is meaningless.
c4 is meaningless. It is meaningless. It is meaningless.
C5 Copy BIOS from ROM for fast self -examination. It is meaningless. It is meaningless.
c6 high -speed cache self -examination. It is meaningless. It is meaningless.
c7 is meaningless. It is meaningless. It is meaningless.
c8 is meaningless. It is meaningless. It is meaningless.
c9 is meaningless. It is meaningless. It is meaningless.
CA to detect Micronies ultra -high -speed buffer stuffed (if existence) and make it initial preparation. It is meaningless. It is meaningless.
cb meaningless. It is meaningless. It is meaningless.
cc off the interrupt processor. It is meaningless. It is meaningless.
CD is meaningless. It is meaningless. It is meaningless.
CE is meaningless. It is meaningless. It is meaningless.
CF is meaningless. It is meaningless. It is meaningless.
D0 is meaningless. It is meaningless. It is meaningless.
d1 is meaningless. It is meaningless. It is meaningless.
d2 is meaningless. It is meaningless. It is meaningless.
d3 is meaningless. It is meaningless. It is meaningless.
d4 is meaningless. It is meaningless. It is meaningless.
d5 is meaningless. It is meaningless. It is meaningless.
d6 is meaningless. It is meaningless. It is meaningless.
d7 is meaningless. It is meaningless. It is meaningless.
d8 is meaningless. It is meaningless. It is meaningless.
d9 is meaningless. It is meaningless. It is meaningless.
DA is meaningless. It is meaningless. It is meaningless.
DB is meaningless. It is meaningless. It is meaningless.
DC is meaningless. It is meaningless. It is meaningless.
DD is meaningless. It is meaningless. It is meaningless.
DE is meaningless. It is meaningless. It is meaningless.
DF is meaningless. It is meaningless. It is meaningless.
e0 is meaningless. It is meaningless. It is meaningless.
e1 is meaningless. It is meaningless. It is meaningless.
e2 is meaningless. It is meaningless. It is meaningless.
e3 is meaningless. It is meaningless. It is meaningless.
e4 is meaningless. It is meaningless. It is meaningless.
e5 is meaningless. It is meaningless. It is meaningless.
e6 is meaningless. It is meaningless. It is meaningless.
e7 is meaningless. It is meaningless. It is meaningless.
e8 is meaningless. It is meaningless. It is meaningless.
e9 is meaningless. It is meaningless. It is meaningless.
ea is meaningless. It is meaningless. It is meaningless.
eb is meaningless. It is meaningless. It is meaningless.
ec is meaningless. It is meaningless. It is meaningless.
ed meaningless. It is meaningless. It is meaningless.
ee processor unexpected exception. It is meaningless. It is meaningless.
ef is meaningless. It is meaningless. It is meaningless.
F0 is meaningless. It is meaningless. It is meaningless.
f1 is meaningless. It is meaningless. It is meaningless.
f2 is meaningless. It is meaningless. It is meaningless.
f3 is meaningless. It is meaningless. It is meaningless.
f4 is meaningless. It is meaningless. It is meaningless.
f5 is meaningless. It is meaningless. It is meaningless.
f6 is meaningless. It is meaningless. It is meaningless.
f7 is meaningless. It is meaningless. It is meaningless.
f8 is meaningless. It is meaningless. It is meaningless.
f9 is meaningless. It is meaningless. It is meaningless.
FA is meaningless. It is meaningless. It is meaningless.
fb meaningless. It is meaningless. It is meaningless.
fc is meaningless. It is meaningless. It is meaningless.
fd meaningless. It is meaningless. It is meaningless.
FE is meaningless. It is meaningless. It is meaningless.
fff Gives control of INT19 guidance to the program, the motherboard is OK. (See the meaning of special code) (see the meaning of special code) (see the meaning of special code)
The special code "00", "FF" and other starting code appear: n n R n1. "00" or "FF" after appearing from a series of other code, the motherboard is OK.
2. If there is no error in the CMOS settings, the non -serious failure will not affect the continuity of BIOS self -inspection, and eventually appears "00" or "FF".
3, "00" or "FF" or other starting code appeared as soon as it was turned on, and the main board was not running.
00 Co CF FF D1 is not working in the CPU. n c1-05 cycle jump clock bad, bios bad, south bridge or I/O bad nC1 C3 C6 memory nrn25 AGP供电,北桥坏rnrn0d后不亮显卡部分rnrn2d 打AGP的AD线,初始化intr信号,查北桥供电rn did not brush the BIOS after 2B, the clock generator is bad, the power supply of the North Bridge is abnormal or it has been hung 50 I/O power supply or I/O bad, the south bridge power supply or the south bridge bad, BIOS, BIOS, BIOS, BIOS, BIOS, Bad
Motherboard diagnostic card code Daquan PCI/ISA dual -purpose DEBUG card failure code bright table (only suitable for PCI/ISA dual -use type and PCI single -purpose type)
00 (see special code meaning) The display system has been displayed. Configuration; Infigurement of INT19 guidance loading. (See the meaning of special code) (see the meaning of special code)
01 processor test 1 to process state verification. If the test fails, the cycle is infinite. The test of the processor register is about to begin, and the interruption cannot be stopped. The CPU register test is in progress or failure.
02 determines the type of diagnosis (normal or manufacturing). If the keyboard buffer contains data, it will fail. Discontinue non -blocking interruption; starting by delay. CMOS is writing/read is in progress or fault.
03 Clear the 8042 keyboard controller and emit Test-KBRD command (AAH). Power -powered delay has been completed. The ROM B10S checking parts are in progress or failure.
04 to reset the 8042 keyboard controller and verify Testkbrd. The keyboard controller is more reset/power -on test. The test of the programm can be performed or failed.
05 If repeatedly repeatedly manufactured 1 to 5, you can get 8042 control status. The soft reset/power is determined; the ROM is about to start. DMA was initially prepared or failed.
06 to make the circuit film initial preparation. Disable videos, spectacles, DMA circuit films, and clear DMA circuit films, all page registers and CMOS stop bytes. Make the circuit films initial preparation, stop video, singularity, DMA circuit film, and remove DMA circuit films, all page registers and CMOS shutdown bytes. ROM BIOS has been started, and the sum of the ROM BIOS inspection, and check whether the keyboard buffer is cleared. DMA initial page register read/write test is in progress or failure.
07 processor test 2 to verify the work of the CPU register. The ROM BIOS test is normal, the keyboard buffer has been cleared, and the BAT (basic guarantee test) command is issued to the keyboard. It is meaningless
08 to make the CMOS timer as initial preparation, and the loop of the timer is updated normally. The BAT command has been issued to the keyboard, and the BAT command is about to be written. The RAM update test is in progress or failure.
09 EPROM Check Term and must be approved by zero. Credit the basic guarantee test of the keyboard, and then verify the keyboard command byte. The first 64K RAM test is ongoing.
0a to make the video interface initial preparation. Send the keyboard command byte code, and the command byte data is about to be written. The first 64K RAM chip or data cable fails and displays.
0b test 8254 channel 0. Write the keyboard controller command by byte, and the blocking/unlock commands of the pin 23 and 24 of pins will be issued. The first 64K RAM Qi/Puppet logic fails.
0c test 8054 channel 1. Keyboard controller pins 23, 24 have been blocked/unlock; NOP command has been issued. The first 64K RAM address line faults.
[MEM] 0D 1. Check whether the CPU speed matches the system clock. 2. Check whether the programming value of the control chip is in line with the initial settings. 3. Video channel test, if it fails, the horn. The NOP command has been processed; then test the CMOS to stop the register. The first 64K RAM's amazing failure.
0E test CMOS shutdown byte. CMOS stops the register read/write test; the sum of CMOS inspection will be calculated. Input/output port address.
0F test expanded CMOS. CMOS tests have been calculated to write the diagnostic bytes; CMOS starts to prepare. It is meaningless.
10 test DMA channel 0. CMOS has made initial preparation, and the CMOS state register is about to make initial preparation for the date and time. The first 64K RAM failure.
11 test DMA channel 1. The COMS state register is initially prepared, and DMA and interrupt controllers are about to be discontinued. The first 64K RAM is the first.
12 test DMA page register. Discontinue DMA controller 1 and interrupt controller 1 and 2; the video display is about to make the port B as the initial preparation. The first 64K RAM is the second.
13 Test 8471 keyboard controller interface. The video monitor has been discontinued, Port B has been initially prepared; The first 64K RAM is the third place.
14 Test the memory update trigger circuit. The automatic detection of the circuit film initialization/memory is over; the 8254 timer test is about to start. The first 64K RAM is the fourth failure.
15 Test 64K system memory beginning. The 2nd channel timer was tested half; 8254 passing the second channel timer is about to complete the test. The first 64K RAM is the fifth failure.
16 Create an interrupt vector table used in 8259. The 2 passage timer test is over; 8254 The 1st channel timer is about to complete the test. The first 64K RAM is the 6th.
17 adjust the video input/output work. The first passage timer test is over; The first 64K RAM is the 7th.
18 Test video memory. If you install the selected video BIOS, you can bypass it. The 0 -channel timer test is over; the memory is about to start. The first 64K RAM is 8th.
19 Test the interrupt controller of the 1st channel (8259). The memory has begun, and the memory update will be completed. The first 64K RAM is the 9th.
1A Test the interrupt controller of the 2nd channel (8259). The memory update line is being triggered, and the 15 microseconds/disconnection will be checked soon. The first 64K RAM is 10th.
1b measuring CMOS battery level. Complete the memory update time 30 microsecond test; the basic 64K memory test is about to start. The first 64K RAM fault.
1c test sum of COMS inspection. It is meaningless. The first 64K RAM failure.
1d adjustment of the configuration of COMS. It is meaningless. The first 64K RAM is the 13th failure.
1E to determine the size of the system memory, and compare objective presence with the COMS value. It is meaningless. The first 64K RAM is 14th in failure.
1F test 64K memory to up to 640K. It is meaningless. The first 64K RAM is the 15th.
20 measures the fixed 8259 interrupt position. Start the basic 64K memory test; the address line is about to test. The subordinate DMA register test is in progress or failure.
21 Maintain an irreversible interruption (NMI) bit (inspection of the puppet or input/output channel). Through the address line test; the puppet is about to trigger. The main DMA register test is in progress or failure.
22 Test the interrupt function of 8259. End triggering spectacle; you will start serial data reading/writing test. The main interrupt shielding register is in progress or fails.
23 test protection method 8086 virtual and pages of 8186. Basic 64K serial data reading/writing test is normal; any adjustment before interrupt vector initialization starts. The subordinate interrupted shielding register test is in progress or failure.
24 to determine extended memory above 1MB. Any adjustment before the vector is completed, and the initial preparation of the vector will soon begin. Set the ES section address register registry to the high -end memory.
25 Test all the memory after the first 64K. The initial preparation of the interrupt vector is completed; the input/output port of 8042 will be read for rotation arbitrarily. The interrupt vector is undergoing or failing.
26 test protection method. Read the input/output port of the read and write 8042; the rotary type is about to start making the global data initial preparation. Turn on the A20 address line; make it participate.
27 Determine the control or shielding RAM of the ultra -high -speed buffer downturn. The initial preparation of all 1 data is over; any initial preparation after interrupt vector will be performed. The keyboard controller test is in progress or failure.
28 determines the control of the ultra -high -speed buffer storage or a special 8042 keyboard controller. The initial preparation of the interrupt vector is completed; CMOS power failure/inspection and computing are in progress.
29 is meaningless. The monochrome method has been adjusted, and the color method is about to be adjusted. CMOS configuration validity checks are ongoing.
2a to make the keyboard controller as initial preparation. The color method has been adjusted, and the trigger is about to be triggered before the ROM test. Set the basic memory of 64K.
2b to make the disk drive and controller as initial preparation. Triggering the end of the strangeness; any adjustment required before the optional video ROM test. The screen memory test is in progress or failure.
2c check the serial port and make it initial preparation. Complete the processing before the video ROM control; the optional video ROM will be viewed and controlled. The screen is initially prepared or failed.
2d to check in parallel serial port and make it initial preparation. In order to complete the optional video ROM control, any other processing control will be performed after the video ROM replies. Scanning test is in progress or failure.
2 to make the disk drive and controller as initial preparation. After the video ROM control is controlled, the processing is restored; if you do not find EGA/VGA, you need to perform a display memory read and write test. Check the video ROM is ongoing.
2F to detect mathematical collaborators and make it initial preparation. No EGA/VGA was found; the memory reading/writing test will be displayed soon. It is meaningless.
30 Establish basic memory and extended memory. By displaying memory reading/writing test; scan check will be performed soon. Think that the screen can work.
31 Detection from C800: 0 to Efff: 0 to select ROM, and make it prepare for life. The display of the memory read/writing test failed, and another display memory read/writing test will be performed soon. Monochrome monitor can work.
32 The program programming of I/O chips on the motherboard COM/LTP/FDD/sound device makes it suitable for setting value. Through another display memory read/write test; another monitor scan inspection will be performed soon. Column monitors (40 columns) can work.
33 is meaningless. The video display is over; the types of the adjustment switch and the actual card inspection of the display will begin. Column monitors (80 columns) can work.
34 is meaningless. The displayed adapter has been tested; then the display is adjusted. Timely titer interrupt test is in progress or failure.
35 is meaningless. Complete the adjustment display method; the data area of BIOS ROM is about to check. The stop testing is in progress or failure.
36 is meaningless. The BIOS ROM data area has been checked; A -20 in the door circuit fails.
37 is meaningless. The cursor of the identification of the power information has been completed; the power -on information will be displayed soon. The accident interruption in the protection method.
38 is meaningless. Complete the display of the power -on information; the new cursor position is about to read. RAM testing is undergoing or address failure> FFFFH.
39 is meaningless. Read the saving cursor position, and the reference information will be displayed soon. It is meaningless.
3A meaningless. The reference information string is over; the information is about to be displayed (ESC). The reference information string is over; the information is about to be displayed. Test or failure of the time interval passage 2.
3b uses OPT circuit films (just 486) to make the auxiliary ultra -high -speed buffer storage memory as initial preparation. Displayed information: virtual method, memory test is about to begin. The calendar clock test calculated daily is in progress or failure.
3c establishment of a sign that allows entering CMOS settings. It is meaningless. The serial port test is in progress or failure.
3D first female Taiwan chemical keyboard/PS2 mouse/PNP equipment and total memory node. It is meaningless. The parallel port testing is in progress or failure.
3E try to open the L2 high -speed cache. It is meaningless. Mathematical processor testing is in progress or failure.
3F is meaningless. It is meaningless. It is meaningless.
40 is meaningless. It has begun to prepare a virtual method test; it is about to be tested from the video deposits. Adjust the CPU speed so that the outer clock is accurately matched.
41 interrupted itself and opened, and the initialization data can be initialized for 0: 0 detection memory transformation (interrupt controller or memory poor). Recovery after the video storage memory test; the descriptor table is about to prepare. The system plug -in board chooses to fail.
42 Display the window into setup. The descriptor table is ready; the virtual method is about to perform a memory test. Extend the CMOS RAM failure.
43 If you plug and play with BIOS, the serial port and initialize the mouth. Enter the virtual method; it is about to achieve interruption for the diagnostic method. It is meaningless.
44 is meaningless. Realized interruption (such as connecting the diagnostic switch; the data is about to check the data to check the memory of 0: 0. BIOS interrupt for initialization. ; The size of the memory is about to return to 0: 0 and find the scale of the system memory. It is meaningless.
46 is meaningless. Test the memory memory has been returned; the memory size is calculated, and the page will be written to test the memory. Check only the memory ROM version.
47 is meaningless. The upcoming memory test page on the extended memory; the basic 640K memory is written to the page. It is meaningless.
48 is meaningless. Write the basic memory to the page; the memory of more than 1MB will be determined soon. Video check, cmos re -configure.
49 is meaningless. Find out 1MB memory and test; it will be determined to determine more than 1MB of memory. It is meaningless meaningless .
4A is meaningless. Finding more than 1MB of memory and testing: The data area of BIOS ROM is about to check. Perform the video initialization.
4b is meaningless. After the inspection is over, it is about to check and clear up 1MB of memory for the soft residence. It is meaningless.
4c is meaningless. Clear more than 1MB of memory (soft reset) to remove more than 1MB of memory. Shielding video BIOS ROM.
4d is meaningless. Remove the memory (soft reset) of more than 1MB; the size of the storage memory. It is meaningless. Information, and wait for the customer to continue according to (F1). Start the test of the memory: (no soft reset); the test of the first 64K memory will be displayed. Show copyright information. Data, conduct DOS guidance. Starting the size of the memory, the testing memory will be updated; it will perform serial and random memory tests. It is meaningless. Stay in CMOS. Complete the memory test below 1MB; the size of the high -speed memory is to be locked and masked. Send the CPU type and speed to the screen.
51 is meaningless. Test more than 1MB of memory. Significance.
52 All ISA reads only memory ROM for initialization, and finally assigns the initialization of IRQ numbers to PCI. It has completed the memory test of more than 1MB; R n
53 If it is not plugged in BIOS, initialize the serial port, and set the clock value. Save the CPU register and memory, and it will enter the real address method. It is meaningless.
54 It is meaningless. Successfully open the real -address method; the register that is about to restore when it is ready to stop. Scan the "strike keys".
55 is meaningless. The register has been restored, and the address line of the door circuit A -20 will be discontinued. It is meaningless.
56 is meaningless. The address line of the A -20 is successfully discontinued; the BIOS ROM data area is about to check. The keyboard test is over.
57 is meaningless. Bios ROM's data area was checked half; continued. It is meaningless.
58 is meaningless. The data area of the BIOS ROM is over; the discovery information will be removed. Non -setting interrupt test.
59 is meaningless. The information has been cleared; the information has been displayed; the test of DMA and interrupt controller is about to start. It is meaningless.
5A meaningless. It is meaningless. Display pressing the "F2" key.
5b meaningless. It is meaningless. Test the basic memory address line.
5c meaningless. It is meaningless. Test 640K basic memory.
5d meaningless. It is meaningless. It is meaningless.
5E is meaningless. It is meaningless. It is meaningless.
5f meaningless. It is meaningless. It is meaningless.
60 Set the hard disk guidance sector virus protection function. Test through the DMA page register; the video memory is about to test. Test extended memory.
61 Display the system configuration table. The video storage memory test is over; the DMA#L basic register will be performed. It is meaningless.
62 starts to use interrupt 19H to guide the system. Through the test of the basic register of DMA#L; the test of the DMA#2 register is about to be performed. Test extended memory address lines.
63 is meaningless. Test through DMA#2 Basic register; the BIOS ROM data area is about to check. It is meaningless.
64 is meaningless. The BIOS ROM data area was checked half and continued. It is meaningless.
65 is meaningless. The BIOS ROM data area is over; the DMA device 1 and 2 will be programmed. It is meaningless.
66 is meaningless. DMA device 1 and 2 programming is over; it is about to use the 59 interrupt controller for initial preparation. The cache registry is optimized.
67 is meaningless. The initial preparation of 8259 is over; the keyboard test is about to start. It is meaningless.
68 is meaningless. It is meaningless. Both external cache and CPUs work.
69 is meaningless. It is meaningless. It is meaningless.
6a meaningless. It is meaningless. Test and show the external cache value.
6b meaningless. It is meaningless. It is meaningless.
6c is meaningless. It is meaningless. Show the shielded content.
6d is meaningless. It is meaningless. It is meaningless.
6E is meaningless. It is meaningless. Display the auxiliary configuration information.
6f is meaningless. It is meaningless. It is meaningless.
70 is meaningless. It is meaningless. The detected error code is sent to the screen display.
71 is meaningless. It is meaningless. It is meaningless.
72 is meaningless. It is meaningless. Is there any error in the detection configuration.
73 is meaningless. It is meaningless. It is meaningless.
74 is meaningless. It is meaningless. Test the real hours.
75 is meaningless. It is meaningless. It is meaningless.
76 is meaningless. It is meaningless. Check the keyboard error.
77 is meaningless. It is meaningless. It is meaningless.
78 is meaningless. It is meaningless. It is meaningless.
79 is meaningless. It is meaningless. It is meaningless.
7a meaningless. It is meaningless. Lock the keyboard.
7b meaningless. It is meaningless. It is meaningless.
7c is meaningless. It is meaningless. Set the hardware interrupt vector.
7d is meaningless. It is meaningless. It is meaningless.
7E is meaningless. It is meaningless. Test whether there is a mathematical processor.
7f meaningless. It is meaningless. It is meaningless.
80 is meaningless. At the beginning of the keyboard test, the keyboard is being cleared and checked, and the keyboard is about to restore the keyboard. Turn off the programmable input/output device.
81 is meaningless. Find out the hardships of the keyboard restoration; the test command of the keyboard control port is about to issue the keyboard control port. It is meaningless.
82 is meaningless. The keyboard controller interface test is over, and the command byte will soon be written and the circulatory buffer is prepared for initial preparation. Detect and install a fixed RS232 interface (serial port).
83 is meaningless. The command by bytes have been written, the initial preparation of global data has been completed; It is meaningless.
84 is meaningless. The keys that have been locked have been checked, and the memory is about to check whether the memory is lost. Detect and install a fixed parallel port.
85 is meaningless. The size of the memory has been checked; soft errors and passwords or bypass arrangements are displayed soon. It is meaningless.
86 is meaningless. Checking passwords: programming is about to be arranged. Re -open the programmable I/O device and test whether there is a conflict of fixed I/O.
87 is meaningless. The programming before the arrangement will be programmed. It is meaningless.
88 is meaningless. Reproduce the screen from the CMOS arrangement; it is about to perform later programming. Initialize the BIOS data area.
89 is meaningless. Complete the arrangement after the arrangement; the screen information is about to be displayed soon. It is meaningless.
8a meaningless. Display the first screen information. Expand the initialization of the BIOS data area.
8b meaningless. Display information: The main and video BIOS is about to block. It is meaningless.
8c is meaningless. Successfully shielded the main and video BIOS, and the programming options after CMOS will start. Perform the soft drive controller initialization.
is meaningless. I have arranged for option programming and then check the mouse and make initial preparation. It is meaningless.
8E is meaningless. Check the mouse and complete the initial preparation; it is about to reset the hard and soft disk. It is meaningless.
8f is meaningless. The soft disk has been checked, and the disk will be initially prepared, and then you want to prepare a soft disk. It is meaningless.
90 is meaningless. Soft disk configuration is over; the existence of the hard disk will be tested. The hard disk controller is initialized.
91 is meaningless. The hard disk is over; then the hard disk is configured. Local bus hard disk controller initialization.
92 is meaningless. The hard disk configuration is completed; the data area of the BIOS ROM is about to check. Jump to user path 2.
93 is meaningless. The data area of BIOS ROM has been checked in half; continuing. It is meaningless.
94 is meaningless. The data area of BIOS ROM is checked, that is, the adjustment of the memory is basically adjusted and the size of the memory. Turn off the A20 address line.
95 is meaningless. The size of the memory is adjusted according to the support of the mouse and hard disk 47; the memory is soon inspected. It is meaningless.
96 is meaningless. The test shows the recovery after the memory; the initial preparation before the C800: 0 is selected. The "ES section" registry is cleared.
97 is meaningless. C800: 0 Select any initial preparation before the ROM control, and then check and control the selection of ROM. It is meaningless.
98 is meaningless. Select the control of the ROM; the processing required after any selection ROM replies. Find ROM selection.
99 is meaningless. Any initial preparation required after the ROM test is ended; the data area or printer basic address of the timer will soon be established. It is meaningless.
9a meaningless. The return operation after adjusting the timer and printing the basic address; the basic address of the RS -232 is about to adjust. Shield the ROM selection.
9b meaningless. Return after the basic address of the RS -232; the initial preparation of the collaborative processor test is about to be performed. It is meaningless.
9c is meaningless. The initial preparation is required before the processor test; the associate processor is then made for initial preparation. Establish power saving management.
9d is meaningless. The collaborator is prepared for the initial preparation, and any initial preparation is about to be tested by the collaborator. It is meaningless.
9E is meaningless. The initial preparation after completing the collaborator will check the expansion keyboard, keyboard recognition symbols, and digital locking. Open hardware interrupt.
9f is meaningless. The extension of the keyboard has been checked, the identification logo is adjusted, and the digital lock is connected or disconnected, and the keyboard recognition command will be issued. It is meaningless.
a0 is meaningless. Endent keyboard recognition commands: The keyboard recognition logo is about to restore. Setting time and date.
a1 is meaningless. The keyboard recognition logo is restored; then tests for high -speed buffer storage storage. It is meaningless.
a2 is meaningless. High -speed buffer storage memory test is over; any soft errors will be displayed soon. Check the keyboard lock.
a3 is meaningless. The soft error display is complete; the rate of keyboard blow is about to adjust. It is meaningless.
a4 is meaningless. After adjusting the keyboard's blow rate, the waiting state of the storage memory is about to formulate. The keyboard repeats the initialization of the input rate.
a5 is meaningless. The memory waiting state is set; then the screen will be cleared. It is meaningless.
a6 is meaningless. The screen has been cleared; It is meaningless.
a7 is meaningless. It has been enabled to block the interrupt and the strangeness; it is about to control any initial preparation required by the optional ROM in E000: 0. It is meaningless.
a8 is meaningless. Control ROM's initial preparation before E000: 0, and then control any initial preparation required for E000: 0. Clear the "F2" key prompt.
a9 meaningless. Return to control E000: 0 ROM, and any initial preparation required to control E000: 0 will be controlled. It is meaningless.
aa meaningless. The initial preparation of the initial preparation after the control of the E000: 0 control is over; the configuration of the system is about to display the system. Scan the "F2" key to strike.
ab is meaningless. It is meaningless. It is meaningless.
ac meaningless. It is meaningless. Enter the settings.
ad is meaningless. It is meaningless. It is meaningless.
ae meaningless. It is meaningless. Clear the self -inspection logo.
AF meaningless. It is meaningless. It is meaningless.
B0 is meaningless. It is meaningless. Check non -critical errors.
b1 is meaningless. It is meaningless. It is meaningless.
b2 is meaningless. It is meaningless. Power -powered self -inspection is prepared to enter the operating system guidance.
b3 is meaningless. It is meaningless. It is meaningless.
b4 is meaningless. It is meaningless. The bee ring rang.
b5 is meaningless. It is meaningless. It is meaningless.
b6 is meaningless. It is meaningless. Detect password settings (optional).
b7 is meaningless. It is meaningless. It is meaningless.
b8 is meaningless. It is meaningless. Clear all description tables.
b9 is meaningless. It is meaningless. It is meaningless.
ba meaningless. It is meaningless. It is meaningless.
bb meaningless. It is meaningless. It is meaningless.
BC is meaningless. It is meaningless. Clear the verification check value.
bd meaningless. It is meaningless. It is meaningless.
Be's default value enters the control chip, which is in line with the adjustable binary default value table. It is meaningless. Clear the screen (optional).
BF test CMOS establishment value. It is meaningless. Detect the virus and prompt to do information backup.
C0 initialize a high -speed cache. It is meaningless. Trial guidance with interrupt 19.
C1 memory self -examination. It is meaningless. Find the "55" and "AA" mark in the guidance sector.
c2 is meaningless. It is meaningless. It is meaningless.
c3 The first 256k memory test. It is meaningless. It is meaningless.
c4 is meaningless. It is meaningless. It is meaningless.
C5 Copy BIOS from ROM for fast self -examination. It is meaningless. It is meaningless.
c6 high -speed cache self -examination. It is meaningless. It is meaningless.
c7 is meaningless. It is meaningless. It is meaningless.
c8 is meaningless. It is meaningless. It is meaningless.
c9 is meaningless. It is meaningless. It is meaningless.
CA to detect Micronies ultra -high -speed buffer stuffed (if existence) and make it initial preparation. It is meaningless. It is meaningless.
cb meaningless. It is meaningless. It is meaningless.
cc off the interrupt processor. It is meaningless. It is meaningless.
CD is meaningless. It is meaningless. It is meaningless.
CE is meaningless. It is meaningless. It is meaningless.
CF is meaningless. It is meaningless. It is meaningless.
D0 is meaningless. It is meaningless. It is meaningless.
d1 is meaningless. It is meaningless. It is meaningless.
d2 is meaningless. It is meaningless. It is meaningless.
d3 is meaningless. It is meaningless. It is meaningless.
d4 is meaningless. It is meaningless. It is meaningless.
d5 is meaningless. It is meaningless. It is meaningless.
d6 is meaningless. It is meaningless. It is meaningless.
d7 is meaningless. It is meaningless. It is meaningless.
d8 is meaningless. It is meaningless. It is meaningless.
d9 is meaningless. It is meaningless. It is meaningless.
DA is meaningless. It is meaningless. It is meaningless.
DB is meaningless. It is meaningless. It is meaningless.
DC is meaningless. It is meaningless. It is meaningless.
DD is meaningless. It is meaningless. It is meaningless.
DE is meaningless. It is meaningless. It is meaningless.
DF is meaningless. It is meaningless. It is meaningless.
e0 is meaningless. It is meaningless. It is meaningless.
e1 is meaningless. It is meaningless. It is meaningless.
e2 is meaningless. It is meaningless. It is meaningless.
e3 is meaningless. It is meaningless. It is meaningless.
e4 is meaningless. It is meaningless. It is meaningless.
e5 is meaningless. It is meaningless. It is meaningless.
e6 is meaningless. It is meaningless. It is meaningless.
e7 is meaningless. It is meaningless. It is meaningless.
e8 is meaningless. It is meaningless. It is meaningless.
e9 is meaningless. It is meaningless. It is meaningless.
ea is meaningless. It is meaningless. It is meaningless.
eb is meaningless. It is meaningless. It is meaningless.
ec is meaningless. It is meaningless. It is meaningless.
ed meaningless. It is meaningless. It is meaningless.
ee processor unexpected exception. It is meaningless. It is meaningless.
ef is meaningless. It is meaningless. It is meaningless.
F0 is meaningless. It is meaningless. It is meaningless.
f1 is meaningless. It is meaningless. It is meaningless.
f2 is meaningless. It is meaningless. It is meaningless.
f3 is meaningless. It is meaningless. It is meaningless.
f4 is meaningless. It is meaningless. It is meaningless.
f5 is meaningless. It is meaningless. It is meaningless.
f6 is meaningless. It is meaningless. It is meaningless.
f7 is meaningless. It is meaningless. It is meaningless.
f8 is meaningless. It is meaningless. It is meaningless.
f9 is meaningless. It is meaningless. It is meaningless.
FA is meaningless. It is meaningless. It is meaningless.
fb meaningless. It is meaningless. It is meaningless.
fc is meaningless. It is meaningless. It is meaningless.
fd meaningless. It is meaningless. It is meaningless.
FE is meaningless. It is meaningless. It is meaningless.
fff Gives control of INT19 guidance to the program, the motherboard is OK. (See the meaning of special code) (see the meaning of special code) (see the meaning of special code)
The special code "00", "FF" and other starting code appear:
n n R n1. "00" or "FF" after appearing from a series of other code, the motherboard is OK.
2. If there is no error in the CMOS settings, the non -serious failure will not affect the continuity of BIOS self -inspection, and eventually appears "00" or "FF".
3, "00" or "FF" or other starting code appeared as soon as it was turned on, and the main board was not running.
00 Co CF FF D1 is not working in the CPU. n
c1-05 cycle jump clock bad, bios bad, south bridge or I/O bad
nC1 C3 C6 memory nrn25 AGP供电,北桥坏rnrn0d后不亮显卡部分rnrn2d 打AGP的AD线,初始化intr信号,查北桥供电rn
did not brush the BIOS after 2B, the clock generator is bad, the power supply of the North Bridge is abnormal or it has been hung
50 I/O power supply or I/O bad, the south bridge power supply or the south bridge bad, BIOS, BIOS, BIOS, BIOS, BIOS, Bad
41 brush BIOS, A18 jump line.pcb broken line, I/O, South Bridge
If the code other than the above code appears, it is garbled. What is it, brush the bios first and talk